• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    A microprocessor is provided in a television receiver which is responsive to a clock signal phase locked to a recurrent signal component of a composite video signal, such as a horizontal line rate signal component. The clock signal frequency is chosen to be an integer multiple of the recurrent signal component and to enable the microprocessor to execute an integer number of uniform instruction cycles during an integer number of periods of the recurrent signal component. The execution of the instruction cycles is brought into a real time phase alignment with the recurrent signal component by causing the microprocessor to execute an instruction during a time interval which is greater than the time required to execute one of the uniform insturction cycles. The phase of subsequently executed uniform instruction cycles is shifted in this manner until signal sampling indicates that the desired phase relationship has been achieved.
    公开号:SU1268119A3
    申请号:SU823462354
    申请日:1982-07-05
    公开日:1986-10-30
    发明作者:Эндрю Варго Роберт
    申请人:Рка Корпорейшн (Фирма)；
    IPC主号:
    专利说明:

    i1
    The invention relates to television, in particular, to devices for matching the microprocessor clock with the video clock for setting the origin of the reference signal relative to the start of the video frame.
    The purpose of the invention is to improve the accuracy of video synchronization.
    Fig. 1 shows the structural electrical circuit of the first embodiment of the device for synchronizing a video signal in a television receiver; Fig. 2 is a structural electrical circuit of the second embodiment of the device for synchronizing a video signal in a television receiver.
    A device for synchronizing a video signal in a television receiver contains (in the first embodiment, FIG. 1) a sync pulse allocation unit 1, a video signal generator 2, a scanning unit 3, a microprocessor 4, a phase detector 5, a low-pass filter 6, a signal generator 7, a frequency divider 8, valve 9 key. ten.
    The second variant of the device for synchronizing the video signal in the television receiver (Fig. 2) further comprises a selector 11, a mixer 12, a controlled amplifier 13, an intermediate frequency filter 14, a filter 15, an analog-to-digital converter 16,
    digital-to-analog converter 17, amplitude detector 18, multiplexer 19, clock extraction unit 20.
    The device for synchronizing the video signal in the first embodiment works as follows.
    On the sync pulse allocation unit 1, video signals are received from the video signal generator 2, which are also fed to the signal input of the valve 9. From the sync pulse selection unit 1, the vertical and horizontal synchronization signals, as well as the composite components, go to the information inputs of the microprocessor 4, directly and through block 3, respectively sweep. The operation of the microprocessor 4 occurs according to the commands stored in the program memory.
    The line blanking signals are also fed to the input of the phase detector 5, from the output of which the signal goes through the low-pass filter 6 to the control input of the signal generator 7
    192
    from the output of which the signal goes to the control input of the phase detector through the frequency divider .8 and to the clock input of the microprocessor 4 via the key 10 Phase detector 5, the low-pass filter 6, the signal generator 7 and the frequency divider 8 form a phase synchronization loop and are designed to create for the microprocessor 4 clock signal, which is in constant phase relation with the blanking signal, microprocessor C receives control signals from key 10 and valve 9 to control the conductivity of valve 9, from which control signal.
    The clock pulse created by the phase synchronization loop activates microprocessor 4 to execute an integer number of one-cycle commands over the duration of one television horizontal line. If a black-and-white and / or non-standard signal with an excellent line length is received, the phase synchronization loop adjusts the clock frequency so that an integer number of commands are executed in the line interval, however these commands are executed in some phase relation to the beginning of each line. After that, microprocessor 4 quantizes the compositional sync signal and receives a clock skip to match the command cycle phase with the video signal. As a result, the origin of each line is set,
    A device for synchronizing a video signal in a television receiver over a second variation (FIG. 2) can be used, for example, to control the transmission bandwidth of the television receiver near the video frequency or the color subcarrier frequency to maximize the transmission bandwidth.
    The main units of the television receiver consist of a series-connected selector 11, a mixer 12, a controllable amplifier 13, and an intermediate frequency filter 14.
    The device according to the second variant operates as follows. The intermediate frequency signal from the intermediate frequency filter 14 is fed to the filter 15 and through the detector 18 to the first input of the multiplexer 19 and to the input of the sync pulse unit 20, the signal from the output of which goes to the corresponding input of the microprocessor 4, the multiplexer 19 controls the signals coming from the microprocessor 4, From the output of the multiplexer 19, the signal is fed to the information input of the microprocessor through an analog-digital converter. 16, The information signal from the microprocessor is fed to a digital-to-analog converter The user 17, the signal from the output of which is fed to the input of the control of the controlled amplifier 13 for setting the intermediate frequency.
    权利要求:
    Claims (2)
    [1]
    1. A device for synchronizing a video signal in a television receiver containing a sync pulse allocation unit, the input of which is connected to the output of a video signal maker, while the first and second outputs of the sync pulse selection unit are connected to the first and second inputs of the scanner, and the third output of the sync pulse selection unit to the first a microprocessor synchronizing input, a phase detector connected in series, a low-pass filter, a signal generator, and a frequency decoder whose output is connected to the transceiver. the input of the phase detector, to the second input of which the output of the scanner is connected, and the data output of the microprocessor is connected to the control input of the valve, the output of which is the output of the device, and the signal input of the valve is connected to the driver's output
    video signal, characterized in that, in order to improve synchronization accuracy, a key is entered into it, the signal input of which is connected to the output of the signal generator, and the control input is connected to the control output of the microprocessor, and the output of the key is connected to the information input of the microprocessor, to the second synchronizing input of which is connected to the output of the scanner.
    [2]
    2. A device for synchronizing a video signal in a television receiver, comprising a serially connected clock extraction unit and a microprocessor, and a serially connected selector, a mixer, a controlled amplifier, an intermediate frequency filter, the output of which is an output of the device, because in order to ensure synchronization accuracy, a filter, an amplitude detector, a multiplexer and an analog-to-digital converter, whose output is connected to a sync, are entered into it; niziruyuschemu input of the microprocessor, the first and second outputs which are respectively connected to the second input of the multiplexer and input inputted analog converter whose output is connected to the second input of the controllable amplifier and the intermediate frequency filter output is connected to the combined filter input, the third input of the multiplexer and input blokavydeleni sync
    ft 2
    类似技术:
    公开号 | 公开日 | 专利标题
    SU1268119A3|1986-10-30|Device for synchronizing video signal in television set |
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    EP0103315B1|1987-07-01|Television receiver comprising a circuit for sequentially tuning the receiver to different frequencies
    ES478723A1|1979-11-01|Color television receiver.
    GB2142801A|1985-01-23|Transmission and reception of component video signals
    GB1267251A|1972-03-15|
    JPS558161A|1980-01-21|Clock generation circuit
    EP0271055A3|1989-03-29|Video recorder with a second video signal track
    US5003395A|1991-03-26|Satellite receiver having an independent active energy dispersal signal generator
    US4706110A|1987-11-10|Apparatus for decoding a PAL standard color television signal
    US4797731A|1989-01-10|Method and apparatus for compatibly locking horizontal sync to the PAL subcarrier
    GB1393674A|1975-05-07|Telephone image transmission system
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    US3067282A|1962-12-04|Television systems
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    GB2175471A|1986-11-26|Synchronizing video sources
    SU1619423A1|1991-01-07|Decoder of ntsc tv receiver
    SU571932A1|1977-09-05|Videochannel for tv receiver
    JPS5636277A|1981-04-09|Video signal recording system
    同族专利:
    公开号 | 公开日
    DK154386B|1988-11-07|
    FI74176B|1987-08-31|
    CZ481782A3|1995-02-15|
    DK154386C|1989-04-10|
    NZ201168A|1986-04-11|
    ATA262082A|1990-02-15|
    FI822320L|1983-01-07|
    GB2105139A|1983-03-16|
    FI74176C|1987-12-10|
    CA1192990A|1985-09-03|
    PL143206B1|1988-01-30|
    IT8222237D0|1982-07-05|
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    AT391235B|1990-09-10|
    DK301682A|1983-01-07|
    HK54489A|1989-07-14|
    PL237288A1|1983-03-14|
    ES8309049A1|1983-10-01|
    ES513440A0|1983-10-01|
    AU8553982A|1983-01-13|
    DD202221A5|1983-08-31|
    KR840001031A|1984-03-26|
    GB2105139B|1986-01-15|
    JPS5824284A|1983-02-14|
    JPH01231492A|1989-09-14|
    FR2509105A1|1983-01-07|
    FI822320A0|1982-06-29|
    JPH0210637B2|1990-03-08|
    NL8202696A|1983-02-01|
    SE454640B|1988-05-16|
    FR2509105B1|1988-06-10|
    US4464679A|1984-08-07|
    DE3225042C2|1987-02-19|
    SE8406255L|1984-12-10|
    JPH0328117B2|1991-04-18|
    DE3225042A1|1983-01-20|
    BE893742A|1982-11-03|
    SE8204033L|1983-01-07|
    SE452233B|1987-11-16|
    KR890000978B1|1989-04-15|
    ZA824779B|1983-06-29|
    PT75122B|1984-05-25|
    PT75122A|1982-07-01|
    SE8204033D0|1982-06-29|
    SE8406255D0|1984-12-10|
    AU557962B2|1987-01-15|
    引用文献:
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    法律状态:
    优先权:
    申请号 | 申请日 | 专利标题
    US06/280,475|US4464679A|1981-07-06|1981-07-06|Method and apparatus for operating a microprocessor in synchronism with a video signal|
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